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Thread: Single M.I failing

  1. #1
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    Single M.I failing

    Good Day,

    So on a job I'm currently programming I'm having a single M.I failing to update. The strange thing is in diagnostics it shows the green check saying there's no issues.

    For this job we have 5 PNL-8's. It is this single M.I (5th PNL) that keeps failing on the transfer. The M.I addressed number (4- starting from default of 0) in link assignment is correctly assigned and I double checked to make sure the M.I dip switch clicked into place at the correlating address number. Our M.I's are wired in a class-A loop and landed on the correct link of the correct processor (there are two processors) however the processor's ERR LED is flashing red. Also the LED on the M.I is green.

    The electrician double checked to make sure the continuity is fine and it is. Also non of the M.I's have the red wire connected.

    I won't be on site for a couple of days but I'm wondering if anyone has any idea's or suggestions on what to check or do.

    Any and all advice would be much appreciated.

    Thanks,
    Matt

  2. #2
    Senior Member
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    Sorry but I only have questions right now, hopefully I can make helpful suggestions with more info-

    - does "a class-A loop" mean one end of the MI buss link starts at the Processor and the other end stops at the last MI, or something else?

    - are there any link terminators installed on the MI buss?

    - what rev HWQS are you using?

    - is all of this hardware the same vintage, or are some parts new adds to an existing system?

  3. #3
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    digit1;

    Class-A is pretty much a daisy chain. It starts at the the processor landing then moves from one MI to the next so the last MI only has the single LV wire.

    There are no MI link terminators that I am aware of. I'll double check with the electrician tomorrow.

    I am using the latest 9.3 beta. I wish I would be able to revert my program back to the non beta but I've done so much additional programming since the update and now the processors firmware and OS is now at 9.3.

    This is a new job so all hardware should be the same vintage. I've been thrown on this job mid way through to help out since the closing of VIA so all I'm doing is the actual programming, upload, trouble shooting, and fine tuning.

    Thanks for taking an interest digit1.

  4. #4
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    Ok that all sounds pretty good to me.

    I would try a link terminator across pins 3 & 4 at the last MI just to make sure that doesn't help. I would remove the terminator if there is no positive effect.

    You could also try juggling MIs around and see if the problem follows the MI or the PNL.

    If it still doesn't make sense then I would load a dummy program in OS 7.4 just to see if it goes through with no problems.

    If a dummy program in 7.4 or 8.5 doesn't fail, I think it's time to email the program to Lutron.

    Good luck- I hope it's something simple!

  5. #5
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    Quote Originally Posted by Matt@ADG View Post
    digit1;

    Class-A is pretty much a daisy chain. It starts at the the processor landing then moves from one MI to the next so the last MI only has the single LV wire.

    There are no MI link terminators that I am aware of. I'll double check with the electrician tomorrow.

    I am using the latest 9.3 beta. I wish I would be able to revert my program back to the non beta but I've done so much additional programming since the update and now the processors firmware and OS is now at 9.3.

    This is a new job so all hardware should be the same vintage. I've been thrown on this job mid way through to help out since the closing of VIA so all I'm doing is the actual programming, upload, trouble shooting, and fine tuning.

    Thanks for taking an interest digit1.
    Dear Matt,

    Thank you for the information.

    If the wiring exceeds 50ft between processors and the last MI then we require using the link terminators at the beginning and end of the link. If no link terminators are used then you may experience issues communicating if exceeding 50ft.

  6. #6
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    Oct 2013
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    Are all your high end trims not equal to 100%? Drop all your loads below 100% and re-transfer. That did the trick for me on a recent project (Thanks HW support!).

  7. #7
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    chutai9, did you have the same symptom? Last MI in a chain failing to transfer? Or some other problem?

  8. #8
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    Quote Originally Posted by digit1 View Post
    chutai9, did you have the same symptom? Last MI in a chain failing to transfer? Or some other problem?
    MI's that had RPM with loads set with 100% high end trims would fail to update. Once I adjusted the trims, everything transferred fine.

  9. #9
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    Thanks for all your help everyone. Turned out it was a bad MI. Got a new one installed and everything is up and running smoothly.

    Thanks again.

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